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ISM 2.0 and India’s Global Chip Ambitions

ISM 2.0 and India’s Global Chip Ambitions

Context

  • The Expenditure Finance Committee under the Ministry of Finance has approved an enhanced budgetary outlay of ₹1.25 lakh crore for the India Semiconductor Mission (ISM) 2.0. This major financial upgrade from the ₹76,000 crore allocated during ISM 1.0 aims to build a resilient, end-to-end indigenous chip manufacturing ecosystem and integrate India into the global semiconductor value chain.

Core Contours of ISM 2.0

  • Strategic Objective: Transition India from an import-dependent tech economy to a competitive global player under the Make in India–Make for the World framework.
  • Expanded Scope (Beyond Fabs): Unlike ISM 1.0, which focused primarily on fabrication plants, ISM 2.0 mandates the domestic production of essential upstream components, including semiconductor equipment, specialty chemicals, and industrial gases.
  • Full-Stack IP Development: Emphasizes the creation of indigenous semiconductor Intellectual Property (IP) to ensure secure, globally competitive chip solutions.
  • Immediate Financial Provision: A dedicated budgetary allocation of ₹1,000 crore for FY 2026–27 has been earmarked to initiate applied R&D, industry-led training, and supply chain resilience measures.

Key Macro Targets

  • Self-Sufficiency Timeline: Achieve 70–75% self-reliance in fulfilling domestic semiconductor demand by 2029.
  • Advanced Node Fabrication: Establish indigenous manufacturing capabilities for cutting-edge 3 nm and 2 nm chips by 2035.
  • Market Scale: Expand the domestic semiconductor market valuation to $100–110 billion by 2030 (scaling up from $38 billion in 2023).

Allied Government Initiatives

  • Modified Programme for Semiconductor Ecosystem: An overarching policy framework with a financial outlay of ₹8,000 crore (FY 2026–27) to expand fabrication and advanced packaging capacities.
  • Design Linked Incentive (DLI) Scheme: Provides direct fiscal support exclusively to fabless companies and startups engaged in semiconductor IP development and design.
  • Digital India RISC-V (DIR-V) Programme: A strategic initiative to promote the development of open-source microprocessors, eliminating reliance on restrictive foreign licensing costs.
  • Chips to Startup (C2S) Programme: Aims to generate high-quality design manpower by providing universities and startups with access to advanced Electronic Design Automation (EDA) tools and fabrication facilities.
  • Indigenous Microprocessors: Focuses on developing sovereign processing engines, such as the DHRUV64, to reduce dependence on imported commercial chips.

Legacy and Status of ISM 1.0 (As of Dec 2025)

  • Fiscal Support: Approved in December 2021, it provided up to 50% direct fiscal support for setting up silicon fabs, compound semiconductors, and testing facilities.
  • Project Realization: Successfully anchored 10 major projects with cumulative investments of ₹1.60 lakh crore across six Indian states.
With respect to the semiconductor manufacturing ecosystem in India, consider the following statements:
I. The India Semiconductor Mission 2.0 expands its scope to mandate the domestic production of upstream components, including specialty chemicals and industrial gases.
II. The Design Linked Incentive Scheme focuses on providing universities and early-stage startups with access to advanced Electronic Design Automation tools.
III. The nation targets establishing indigenous manufacturing capabilities for 3 nm and 2 nm advanced nodes by the year 2035.
How many of the above statements are correct?
(a) Only one
(b) Only two
(c) All three
(d) None
Answer: B
Explanation:
Statement I is correct: The India Semiconductor Mission 2.0 broadens the manufacturing ecosystem beyond mere fabrication plants to include the localized production of essential upstream elements such as semiconductor equipment, specialty chemicals, and industrial gases.
Statement II is incorrect: The Design Linked Incentive Scheme provides direct fiscal support exclusively to fabless companies for semiconductor Intellectual Property (IP) development. It is the Chips to Startup (C2S) Programme that provides universities and startups with access to Electronic Design Automation (EDA) tools and fabrication facilities.
Statement III is correct: Strategic macro targets for India's semiconductor landscape include achieving 70–75% self-reliance in fulfilling domestic demand by 2029 and establishing domestic fabrication capabilities for cutting-edge 3 nm and 2 nm chips by 2035.
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